1. Field of the Invention
The present invention relates to electronic memory circuits and more particularly to integrated electronic memory circuits including means for providing input data signals to a memory array and to electronic memory access systems for retrieving data from integrated electronic memory circuits.
2. Description of the Related Art
Electronic memory circuits comprising an electronic memory array for storing binary data in an array of memory locations are well known in the art. Typically, a memory array receives address signals which cause the memory array to generate output data signals corresponding to binary data stored in the array at addressed memory locations. Often, a latch or a register is coupled to the . electronic memory array for timing the provision of address signals to the memory array. Similarly, a latch or a register often is coupled to the memory array for receiving the output data signals from the memory array, and for timing their provision, as circuit output signals, to an outside environment.
In the past, sequential electronic logic systems often included diagnostic circuits for detecting and pin-pointing hardware related failures in the system. Broadly speaking, typical earlier diagnostic circuits included means for initializing data input to a system and means for sampling data provided by the system. For example, in one prior system, a diagnostic register was provided which received control data to be input to a sequential system in order to initialize the system for diagnostic purposes. The diagnostic register broke the normal feedback path of the sequential system, and established a logical path in which control signals could be provided to the system and resultant output signals could be sampled. This earlier type of diagnostic register is described in U.S. Pat. No. 4,476,560 issued to Miller et al on Oct. 9, 1984.
Prior electronic memory systems frequently utilized pipelining techniques to increase the speed at which stored binary data could be retrieved from memory. Pipelining techniques often involved the simultaneous performance of a succession of tasks by an electronic memory system upon the provision of appropriate timing signals. For example, while a memory circuit was retrieving binary data stored in a memory array in response to a set of present binary address signals, an input latch or register could be receiving a set of future address signals for provision to the memory circuit, and an output latch or register could be providing system output signals corresponding to a set of previous address signals.
While these earlier electronic memory circuits and electronic memory systems generally have been acceptable, there have been shortcomings with their use. For example, because of the increasing speed with which electronic memory circuits can write data into a memory array and read data from the array, there often was difficulty in providing input data signals to an electronic memory circuit. More specifically, there often were problems providing very short control signals of the general type known as write enable signals, which enable a memory array to write input data into the array.
One illustrative well known type of write enable signal can take on either of two states, LOW or HIGH. During the provision of a LOW write enable signal to a memory array, for example, input data can be written into the array, but output data cannot be read from it. Conversely, during the provision of a HIGH write enable signal, output data can be read from the memory, but input data cannot be written into it.
The advent of increasingly fast memory arrays has led to a decrease in the time required to write input data into such arrays, and as a result, with regard to the illustrative type of enable signal above, correspondingly brief LOW write enable signals are required to write input data into arrays at high speeds. When the time duration of a LOW write enable signal is longer than is required to write data into an array, the reading of data from the array may be unnecessarily slowed because, as mentioned above, output data typically cannot be read from the array during the provision of a LOW write enable signal. Moreover, for some memory arrays, the time required to write input data into an array may be no more than a few nanoseconds. Unfortunately, however, the provision of a LOW write enable signal measuring only a few nanoseconds in time duration can be a difficult task for the user of such an array.
Furthermore, electronic memory circuits of the general type discussed above often suffer from inefficiencies associated with the implementation of the circuits using discrete components. Generally, such circuits were implemented using a discrete input latch or register, a memory array and a discrete output latch or register. A factor which vitiated the integration of these components into a single integrated circuit was the fact that in some applications latches were desired and in others registers were desired. For example, in ECL based systems, a latch often was the preferred means for providing address signals and for receiving output data signals, because in ECL systems, a latch usually experiences approximately one-half the propagation delay of a register. Nevertheless, even in ECL systems, a registered signal often was desired.
Unfortunately, however, latches and registers often are not easily interchangeable. For example, latch outputs typically follow latch inputs when a latch is enabled; that is, the latch appears to be transparent. Register output signals, however, ordinarily change state only at an edge of a clock pulse. Thus, ordinarily a user would use a latch circuit when it was desireable for output signals to follow input signals, and he would use a register circuit when it was desirable for output signals to change state only at an edge of a clock pulse.
Thus, there exists a need for an integrated electronic memory circuit in which input data signals can be easily written into a memory array in a relatively short time period and which includes elements which alternatively can act like a latch or like a register. The present invention meets these needs.